The present invention relates generally to circuit design and, more particularly, to reduction of bus switching activity.
Power concerns often drive the designs of circuitry. Circuit designs must account for generated heat and total power requirements, demands that become increasingly challenging as circuits become more compact, include more elements, and operate at ever higher frequencies. Moreover, mobile devices typically rely on batteries with limited charges. Therefore, reduced power use corresponds to longer availability of devices between charges.
In accordance with the present invention, techniques for reducing bus switching activity are provided. According to particular embodiments, these techniques reduce power consumption of electronic devices.
According to a particular embodiment, a method for reducing switching activity on a bus maintains a current value on an address bus if a target address is sequential. The method encodes the target address on the address bus if the target address is not sequential and if the target address is not equal to the current value on the address bus. The method sends a sequential address (the sum of the previous target address plus a constant) on the address bus if the target address is equal to the current value on the address bus.
According to another embodiment, a method for reducing switching activity on a bus receives a target address for communication to a memory on an address bus. The method determines an offset between the target address and a previous target address, inverts selected bits of the offset if the offset is negative, and performs an exclusive-or operation between the offset and a previous coded offset sent on the address bus. The method further sends a result of the exclusive-or operation on the address bus.
According to another embodiment, a method for reducing switching activity on a bus receives a target address for communication to a memory on an address bus. The method determines an offset between the target address and a previous target address and accesses a limited code book using the offset, the limited code book mapping a plurality of offset entries into a plurality of code entries. If the offset matches one of the offset entries, the method sets a coded offset equal to the one of the code entries corresponding to the matching offset entry. If the offset matches one of the code entries, the method sets the coded offset equal to the one of the offset entries corresponding to the matching code entry. If the offset fails to match one of the offset entries or one of the code entries, the method sets the coded offset equal to the offset. The method performs an exclusive-or operation between the coded offset and a previous coded offset sent on the address bus and sends a result of the exclusive-or operation on the address bus.
Embodiments of the invention provide various technical advantages. These techniques, when appropriately implemented, decrease switching activity of instruction address busses within circuits. This helps achieve two primary goals of circuit design: reduced heat and lower power consumption.
In addition, use of these techniques requires minimal extra circuitry or changes to existing circuit designs. For example, some of the disclosed techniques permit operation without the addition of new control or communication lines. Therefore, these techniques may be implemented using existing boards and circuit elements.
Other technical advantages of the present invention will be readily apparent to one skilled in the art from the following figures, descriptions, and claims. Moreover, while specific advantages have been enumerated above, various embodiments may include all, some, or none of the enumerated advantages.